1. Field of the Invention
The present invention relates to a semiconductor integrated circuit device, and in particular, to technology effective for application to a semiconductor integrated circuit device having a high density integrated memory circuit formed of a phase change material, a memory combined with a logic wherein a memory circuit and a logic circuit are provided on the same semiconductor substrate, or an analog circuit.
2. Description of the Related Art
With a memory combined with a logic, wherein a memory (phase change memory) using a resistor element made of, for example, a phase change material, and a logic circuit made up of MISFETs (Metal Insulator Semiconductor Field Effect Transistors), and so forth, are provided on the same semiconductor substrate, all or parts of memory cell elements adjacent to each other are formed by dividing the phase change material in, for example, an etching process. Further, a bit line contact electrode for electrically connecting a bit line for use in designating an address of each of the memory cell elements with an active area on a semiconductor substrate of each of the MISFETs is disposed between the resistor elements making up respective memory cells. One related to this type of device has been disclosed in, for example, Japanese Patent Laid-open No. 2002-540605. Further, a memory cell with a structure using a diode as a selection element by having a plate electrode made of a phase change memory material, for common use, has been disclosed (refer to, for example, Japanese Patent Laid-open No. 1993-21740, and Japanese Patent Laid-open No. 2003-100084). Still further, a memory cell with a structure using a transistor as a selection element by having a plate electrode made of a phase change memory material, for common use, has been disclosed (refer to, for example, Japanese Patent Laid-open No. 2003-100991).
With a process technology for isolating resistor elements from each other for every memory cell, the isolated surfaces of the phase change material change in characteristics. First, the isolated surfaces of the phase change material come into contact with a different material such as, for example, an inter-level insulation film, and so forth. Also, in the case of the resistor elements being isolated from each other by etching, memory cell elements vary in shape. Further, portions of the phase change material, exposed due to isolation, change in composition.
As a result, a problem has arisen in that deterioration occurs to reliability in respect of the number of refresh times of a phase change memory, for use in a highly integrated memory circuit and the memory combined with the logic, of which uniformity in electrical characteristics is required.
Further, in the case of technology whereby a bit line plug is disposed between memory cell elements, a limitation is imposed on disposition of the memory cell elements by the bit line plug.
As a result, a problem has been encountered that a limitation is imposed on integration of memory cells.
Furthermore, in the case of a phase change memory technology using a MISFET as a selection switch, memory cell lower contact electrodes connected to a phase change memory differ in shape from contact electrodes not connected to the phase change memory in order to achieve higher performance of the phase change memory.
As a result, a problem has arisen in that a process technology for use in the memory combined with the logic becomes complicated, resulting in higher cost.